The International HDL Conference and Exhibition

HDLCon 2001 Technical Program

Thursday Sessions Friday Sessions Tutorials Keynote Addresses

Tutorial 4 • Vera: An Introduction to Using Vera for Design Verification
Chris Spear, Alex Fasan - Synopsys, Inc.

Wednesday February 28 • 8:30am - 12:00 Noon

This tutorial gives an introduction to the Vera Hardware Verification Language. It covers the features which are useful for verification including random stimulus generation, response checking, concurrent processes and inter-process communication. It also covers how Vera communicates with the HDL model of the device under test. Lastly, it will discuss functional coverage, and how a Vera testbench can modify the stimulus on the fly based on the results from the simulation.

	Tutorial 4 • Vera: An Introduction to Using Vera for Design Verification Chris Spear, Alex Fasan - Synopsys, Inc.
Wednesday February 28 • 8:30am - 12:00 Noon
	This tutorial gives an introduction to the Vera Hardware Verification Language. It covers the features which are useful for verification including random stimulus generation, response checking, concurrent processes and inter-process communication. It also covers how Vera communicates with the HDL model of the device under test. Lastly, it will discuss functional coverage, and how a Vera testbench can modify the stimulus on the fly based on the results from the simulation.