The International HDL Conference and Exhibition

HDLCon 2001 Technical Program

Thursday Sessions Friday Sessions Tutorials Keynote Addresses

Tutorial 6 • SuperLog: A Practical Approach to System Verification and Hardware Design
Peter Flake, Phil Moorby, Dave Rich - Co-Design Automation, Inc.

Wednesday February 28 • 1:00pm - 4:30pm

Across hardware implementation, design verification, and systems analysis, new requirements have surfaced that simply cannot be satisfied utilizing existing techniques in a productive manner. Verilog and VHDL designers are evolving their methodologies to incorporate powerful new capabilities offered by SUPERLOG. The SUPERLOG design language utilizes Verilog and Verilog-2000 as a base, plus leverages C constructs and specialized system and verification features to greatly exceed the power provided by a regular HDL. This tutorial will provide the first public introduction to the SUPERLOG language. Topics included are: efficient hardware design with SUPERLOG, verification environments, and system level analysis including communications orientated design and advanced control/data modeling. Whether you are a Verilog hardware designer, a verification specialist looking for an easier and more efficient test specification environment, or a systems analyst requiring efficient algorithmic modeling with a streamlined path to silicon, this tutorial will give you the basic knowledge to transform your HDL methodology.

	Tutorial 6 • SuperLog: A Practical Approach to System Verification and Hardware Design Peter Flake, Phil Moorby, Dave Rich - Co-Design Automation, Inc.
Wednesday February 28 • 1:00pm - 4:30pm
	Across hardware implementation, design verification, and systems analysis, new requirements have surfaced that simply cannot be satisfied utilizing existing techniques in a productive manner. Verilog and VHDL designers are evolving their methodologies to incorporate powerful new capabilities offered by SUPERLOG. The SUPERLOG design language utilizes Verilog and Verilog-2000 as a base, plus leverages C constructs and specialized system and verification features to greatly exceed the power provided by a regular HDL. This tutorial will provide the first public introduction to the SUPERLOG language. Topics included are: efficient hardware design with SUPERLOG, verification environments, and system level analysis including communications orientated design and advanced control/data modeling. Whether you are a Verilog hardware designer, a verification specialist looking for an easier and more efficient test specification environment, or a systems analyst requiring efficient algorithmic modeling with a streamlined path to silicon, this tutorial will give you the basic knowledge to transform your HDL methodology.