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| For our 12th anniversary session, HDLCon has changed its name to Design and Verification Conference & Exhibition, or DVCon.
This new name is both necessary and appropriate. It expands the conference to include verification languages, as well as hardware description languages and software implementations. It is now a more comprehensive forum to fully explore language solutions to both implement and verify hardware virtual prototypes. With this more complete viewpoint, design engineers, verification engineers, EDA professionals, university researchers, and industry pundits assemble to exchange ideas. The new languages, concepts, papers, panels, tutorials and vendor exhibits, all representing hardware/software design and verification will provide you with an exciting environment for your interaction and your participation. |