Session 2 - System and SoC Design

2.2 10 Million Gate ASIC Design using Hierarchical Layout Style and Behavioral C Synthesis with SoC Test Strategy
Takamitsu Yamada, Yasutaka Tsukamoto, Hidetaka Minami, Zenji Oka - Ricoh Co., Ltd.
John McGehee - Voom, Inc.

2.3 Verification of an SoC Subsystem Using Multiple Environments
Ravikumar Chilakamarri, George Apostol, Farhad Ahmed - Brecis Communication Corp.

2.5 Why You, or Your Replacement, will use SystemC for System Design
Brett Cline - Forte Design Systems

2.6 My SLDL is Better than Yours (A Tale of SystemC in Three Parts)
Eric Aardoom - Analog Devices, Inc.