| This tutorial presents the design flow in a new way. It serves to put into perspective the tools and libraries that are applied, the inherent data interfaces, the assertion based verification that is emerging, as well as the sanity checking that keeps the flow moving forward. You will be exposed to the basic chip design flow philosophy that handles the very real issues faced in the workplace; flaky tools, large data files, unknown IP specifications, changing IC specifications, technology changes, foundry issues, impossible schedules, legacy, and fear of the dead chip. |
