Technical Program

John Cooley returns as the moderator for Tuesday afternoon's panel. He will be hosting a star-spangled panel of executives and industry commentators. While the panelists will be open for questions on any topic, they will provide specific commentary on recent developments and trends impacting high tech careers and hiring. Other panels take on the challenges of higher-level design, IP verification and the impacts of language evolution on design and verification.

We are lucky to have Ray Bingham, President and CEO, Cadence Design Systems kick off our technical sessions on Tuesday morning with an anticipated keynote on current trends in design and verification.

New this year will be a select choice of sponsored tutorials. Through the support of the sponsors, we are able to offer these tutorials, on a space available basis, free to conference registrants. Of course, we also have a valuable selection of tutorials available on a traditional pay-to-attend basis. If you want to learn more about SystemC, SystemVerilog, PSL and assertion-based verification, VHDL transaction-based verification, coverage-based verification and hardware/software co-verification of ARM SoC designs, we have the tutorials for you. All of our tutorial presenters are top-notch and highly respected in the industry.

I thank the members of the Technical Program Committee for coordinating and the authors, panelists and presenters for delivering, once again, the industry's best conference on design and verification. I hope to see you at the Conference!

Sincerely,

Stephen Bailey
Technical Program Chair