DVCon 2005 EXHIBITOR

Synopsys, Inc.
Booth # 306
700 E. Middlefield Rd.
Mountain View, CA 94043
(650) 584-5000
www.synopsys.com

The Discovery™ Verification Platform is a unified environment providing high performance and productivity for complex SoC design verification. Discovery offers mixed-HDL, mixed-signal and system-level simulation supporting SystemVerilog, VHDL and SystemC™. Advanced verification technologies are provided for assertions, code coverage, functional coverage, testbenches and formal analysis to rapidly identify all of your design bugs. Synopsys' offers a complete line of functional verification solutions that include VCS® complete RTL verification solution, System Studio system-level verification, Leda® programmable RTL checker, Vera® testbench automation, Magellan™ hybrid RTL formal verification, DesignWare® verification IP, Formality® equivalence checker, NanoSim® and HSPICE® mixed-signal simulation.

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