|
Synopsys, Inc.
Booth # 408
700 E. Middlefield Rd.
Mountain View, CA 94043
650-584-5000
Synopsys Discovery Verification Platform, on exhibit in booth 408, is a unified environment that provides high performance and efficiency of interaction among all platform components, including mixed-HDL simulation, mixed-signal, system-level verification, assertions, verification IP from the VCS Verification Library, code coverage, functional coverage, testbenches, and formal analysis. Combined with support for industry-standard hardware design and verification languages, including Verilog, VHDL, SystemVerilog, SystemC and OpenVera®, and Synopsys proven Reference Verification Methodology, the Discovery Verification Platform helps designers achieve higher levels of verification productivity by contributing to first-time silicon success within required project cycles. Also see how the Synopsys VCS® comprehensive RTL verification solution delivers up to 5x faster performance.
|