Veritools, Inc.
Booth # 305
459 Hamilton Ave., Ste. 200
Palo Alto, CA 94301
650-462-5590

Reduce your HDL design cycle up to 50%! Veritools' software increases productivity for designers using Verilog, VHDL and SystemVerilog. Undertow Suite provides a comprehensive RTL source code debug environment with multiple windows for source code, waveforms, RTL and Gate schematics, state diagrams and our new SystemVerilog Assertion Evaluator. Veritools' data formats provide instantaneous load and display as well as file compression up to 1,300 times. Most digital and analog simulators are supported on a wide variety of platforms.

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