Tutorial sponsored by:

Organizers: Tom Fitzpatrick - Mentor Graphics Corp.
Larry Toda - Mentor Graphics Corp.

Presenters: Tom Fitzpatrick - Mentor Graphics Corp.
Harry Foster - Mentor Graphics Corp.
Ambar Sarkar - Paradigm Works
John Aynsley - Doulos Ltd.

This in-depth, half-day tutorial covers using the Mentor Graphics Advanced Verification Methodology (AVM) to develop testbenches for real-world applications. The tutorial walks-through a detailed example of writing a testbench for a moderately complex design, the overall architecture, construction of individual verification components, and infrastructure to allow new scenarios to be generated with minimum additional coding.

While many engineers understand the concepts of new verification techniques, they may be unsure of how best to apply them to their particular project. Mentor’s AVM was developed explicitly to help verification teams get past this “blank page” phase of the project by providing a library of modular, reusable transaction-level verification components to efficiently create transaction-level testbenches for today’s advanced technologies: constrained-random stimulus, functional coverage, and assertions.

The tutorial begins with an overview of Transaction-Level Modeling, the AVM library, AVM components usage, the planning and analysis required to determine the optimal architecture for the verification of a router design (developed by Paradigm Works). Key aspects of the testbench: stimulus generation, assertions for functional coverage, and scoreboarding are discussed, plus a demonstration encapsulating the testbench for reusability and customization.
The next section covers writing effective assertions for simulation and formal verification, using assertions to gather transaction-level information, and how the AVM communicates information between modules and classes throughout the testbench.

The tutorial concludes with the AVM development process, the collaboration between Mentor Graphics, its partners, and customers. This discussion includes Dr. Sarkar on an overview of the SytemVerilog Frameworks, and Mr. Ansley on coverage-based methodology.