Practical Deployment of Assertion-Based Verification and Formal Analysis

Organizer: Michal Siwinski- Cadence Design Systems, Inc.
Presenter: Lovleen Bhatia - Texas Instruments Inc.
Erich Marschner - Cadence Design Systems, Inc.
Faisal Haque - Verification Central
Raghavan Menon - Ingot Systems, Inc.
Jon Michelson - Verification Central
Axel Scherer - Cadence Design Systems, Inc.

Pragmatic Adoption of Verification Methodology Manual (VMM) for Re-usable Transaction-Based Testbenches in SystemVerilog

Organizer: Synopsys, Inc.
Presenters: Srinivasan Venkataramanan - Synopsys, Inc.
Ben Cohen - Vhdlcohen Publishing
Ajeetha Kumari - Contemporary Verification Consultants

Practical Applications of Mentor’s Advanced Verification Methodology (AVM)

Organizers: Tom Fitzpatrick - Mentor Graphics Corp.
Larry Toda - Mentor Graphics Corp.
Presenters: Tom Fitzpatrick - Mentor Graphics Corp.
Harry Foster - Mentor Graphics Corp.
Ambar Sarkar - Paradigm Works
John Aynsley - Doulos Ltd.

Using Formal Verification to Attain Completeness and Correctness

Organizers: Francine M. Bacchini - Francine Bacchini , Inc.
Presenters: Lawrence Loh - Jasper Design Automation, Inc.
Mercedes Tan - Sun Microsystems
Jay Littlefield - Jasper Design Automation, Inc.

EXHIBITS OPEN:

4:00 pm - 7:00 pm

SystemC Transaction Level Modeling Standards and Methodology Guidelines

Organizer: John Aynsley - Doulos Ltd.
Presenters: John Aynsley - Doulos Ltd.
Stuart Swan - Cadence Design Systems, Inc.
Trevor Wieman - Intel Corp.
Ryan Bedwell - Freescale Semiconductor, Inc.