CALL FOR ABSTRACTS - CLOSED
If you have changes to your contact information, please contact Lisa Roby at firstname.lastname@example.org
The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical usage of specialized design and verification languages such as SystemC, SystemVerilog and e, assertions in SVA or PSL, as well as the use of AMS languages, design automation using IP-XACT and use of general purpose languages C and C++. This call for abstracts solicits for presentations that are highly technical and reflect real life experiences in using languages, standards, methods and Electronic Design Automation (EDA) tools. Submissions are encouraged in (but not restricted to) the following areas:
Topic Area 1: System-Level Design
|Topic Area 2: Verification & Validation|
|Transaction level modeling for system-level design||Formal and semi-formal techniques|
|Hardware/software/embedded co-design||Hardware/software co-verification|
|System-on-Chip and Network-on-Chip design||Using multiple HDLs and/or HVLs in a design cycle|
|System-level design techniques, flows and methodologies||Automated stimulus generation methods|
|High-level synthesis from ESL languages||Advance methodologies and testbenches|
|Virtual and Hardware (FPGA) prototyping||Verification process and resource management|
|Topic Area 3: IP Reuse and Design Automation||Topic Area 4: Mixed-Signal Design and Verification|
|Tool and flow automation usng IP-XACT||Mixed-signal design and verification|
|SoC and IP integration methods and tools||Real-value modeling approaches|
|IP protection and security||Application of mixed-signal extensions for UVM|
|Configuration management of IP and abstraction levels||AMS sytem-level and concept design|
|Interoperability of models and/or tools|
Topic Area 5: Lower Power Design and Verification
|Low Power Design|
|Pow Power verification|
|Power estimation techniques|
|Power management through software|
Please submit your 400-500 word abstract by Tuesday, August 27, 2013 to the DVCon website: www.dvcon.org outlining your proposed presentation.
DVCon honors the Best Paper/Presentation and Best Poster submissions. The awards will be selected by the attendees at DVCon, based on the quality of both the paper and the presentation. So please submit your abstract and join DVCon 2014!
Full instructions and details for the abstract submission process can be found on www.dvcon.org
|Abstract Submission Guidelines|
|• Abstract title
• Name, affiliation, phone number and email addresses for all authors.
• An introduction that specifies the context and motivation of the submission.
• A summary of the specific contributions of your work.
• A summary that highlights results. To evaluate your contribution, you must specify some results.
• Must be 400-500 words and maximum 2 pages.
• Provide enough details so that the Technical Program Committee can evaluate the potential quality and interest of your possible presentation at DVCon.
• References, if appropriate
|Tentative Conference Schedule||Important Deadlines|
|Monday, March 3: Half Day Tutorials, Exhibits||August 27: Abstract Deadline|
|Tuesday, March 4: Technical Sessions, Exhibits, Poster Session||October 23: Official Accept/Reject Notification
sent to all authors
|Wednesday, March 5: Technical Sessions, Exhibits, Poster Session||Accepted authors will be invited and agree to do the
following by November 29:
• Submit a Final Paper (maximum 8 pages)
• Register for the conference
• Submit a copyright form
|Thursday, March 6: Half Day Tutorials||All accepted authors agree to present and oral or
poster presentation at the conference on either –
March 3 or 4
• Please note: Consistent with the requirements for
other DVCon presentations, your presentation may
contain your company logo only on the title slide
Stan Krolikoski, Cadence Design Systems, Inc.
Ambar Sarkar, Paradigm Works, Inc.
Program Vice Chair
David Black, Doulos
Program Vice Chair
Martin Barnasconi, NXP Semiconductors