MARCH 2-5, 2015

DoubleTree, San Jose

Conference Sponsor: 

MP Associates, Inc.

WEDNESDAY March 05, 3:30pm - 5:00pm | Fir Ballroom



SESSION 11

REGULAR SESSION: SoC and IP Integration Methods and Tools
Chair:
Stuart Sutherland - Sutherland HDL, Inc.



11.1Reusing UVM Testbenches in a Cycle Simulator
 Speaker: Kristina Hager - IBM Corp.
 Authors: Kristina Hager - IBM Corp.
Andrew Lynch - Cadence Design Systems, Inc.
Umer Yousafzai - Cadence Design Systems, Inc.
11.2Leveraging IP-XACT Standardized IP Interfaces for Rapid IP Integration
 Speaker: David Murray - Duolog Technologies Ltd.
 Authors: David Murray - Duolog Technologies Ltd.
Simon Rance - Duolog Technologies Ltd.
11.3Accelerated, High Quality SoC Memory Map Verification Using Formal Techniques
 Speaker: Rajesh Kedia - Texas Instruments India Pvt. Ltd.
 Authors: Cletan Sequeira - Texas Instruments India Pvt. Ltd.
Rajesh Kedia - Texas Instruments India Pvt. Ltd.
Lokesh Babu Pundreeka - Cadence Design Systems, Inc.
Bijitendra Mittra - Cadence Design Systems, Inc.