SESSION 11
REGULAR SESSION: Assertions
Moderator: Harry Foster - Mentor Graphics Corp.
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| 11.1 | IEEE 1800-2009 SystemVerilog: Assertion-based Checker Libraries | |
| Speaker: | Eduard Cerny - Synopsys, Inc. |
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| Authors: | Eduard Cerny - Synopsys, Inc. Surrendra Dudani - Synopsys, Inc. Dmitry Korchemny - Intel Corp. |
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| 11.2 | Asynchronous Behaviors Meet Their Match with SystemVerilog Assertions | |
| Speaker: | Doug Smith - Doulos |
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| Author: | Doug Smith - Doulos |
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| 11.3 | Using Assertions in an Active Way to Design and Verify Interface between Analog and Digital Blocks | |
| Speaker: | Hyundon Kim - Samsung |
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| Authors: | Hyundon Kim - Samsung Wesley Park - Mentor Graphics Corp. Jiang Long - Mentor Graphics Corp. Chi Ho Cha - Samsung Jae Beom Kim - Samsung Byeong Min - Samsung Kyu Myung Choi - Samsung |
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