SESSION 35
KEYNOTE: Breaking Through the Efficiency Barrier
With world markets beginning to show signs of improved conditions, the electronics industry must anticipate a strong rebound and prepare for significant growth throughout 2011 – and beyond. To effectively manage this upcoming shift, the industry must approach the product development process much differently. The classic “brute force” methods cannot scale to support the complexity of today’s SoCs and Systems. These traditional methods result in mounting costs and unpredictable schedules that are detrimental to profitability.
In this session, Cadence President and CEO Lip-Bu Tan will share his insights on how today’s electronics companies can break through the efficiency barrier formed by insurmountable complexity and costs. He will explain how embracing higher abstractions of design and verification, reuse, metrics, and up-front tradeoffs can boost productivity and reduce tail-end iterations. Learn how these improvements will result in reduced SoC realization costs and increased predictability and ultimately prepare the industry to drive the next wave of technology innovation.
Bio: Lip-Bu Tan is President and Chief Executive Officer of Cadence® Design Systems, Inc. A member of the Cadence Board of Directors since 2004, he is also the chairman of Walden International, a venture capital firm he founded in 1987.
Tan received an M.S. in nuclear engineering from the Massachusetts Institute of Technology, an MBA from the University of San Francisco, and a B.S. from Nanyang University in Singapore. He serves on the Board of Directors of both the Electronic Design Automation Consortium (EDAC) and the Global Semiconductor Association (GSA).
Speaker:
Lip-Bu Tan - Cadence Design Systems, Inc.