DVCon announces the 2009 Technical Program!
The conference is focused on bringing you information from the leading edge of technology, techniques, standards and methods. We continually strive to enhance the value of DVCon to make it workth the investment of your time in attedning, so this year we have extended the technical program to include three additional paper sessions and have expanded the exhibit hours. As always, the program offers sponsored tutorials, vendor-sponsored lunches (and breakfast, too) with plenty of other educational and entertaining features.
REGISTER NOW!
Attend these exciting events!
Wednesday Keynote:
The Techonomics of Verification Aart de Geus - Chief Executive Officer and Chairman of the Board, Synopsys, Inc.
Wednesday Panel:
EDA: Dead or Alive? Moderator: Peggy Aycinena - Editor, EDA Confidential
Thursday Panel:
Mixing Formal Analysis with Simulation: Why, When, Where and How?
Technical Sessions
Verification Methodology and Testbenches -I
Emulation/Acceleration
Increasing Functional Coverage
Low End Power Management
Programming with SystemVerilog
Advance Program
Accellera's Technical Excellence Award recognizes the outstanding achievements of its Technical Subcommittee members in creating electronic design standards. The winner of the 2009 Technical Excellence Award will be publicly recognized at DVCon.