February 26 - March 1, 2018

DoubleTree Hotel, San Jose, CA

Call for Tutorials

 View Call For Tutorials PDFSubmit Now!

 

DVCon is the premier conference on the application of languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. The focus of the conference is the usage of specialized design and verification languages such as Verilog, SystemVerilog, VHDL, PSL, SystemC and e, as well as general purpose languages such as C, C++, PERL, Tcl, and Python. Tools and methodologies include the use of testbench automation, hardware-assisted verification, hardware/software co-verification, assertion-based  and  formal verification, transaction-level system design, high level synthesis, low power design techniques, 3D chip designs, IP based SoC design methods, reference flows and AMS design.

DVCon is looking for tutorial topics that are current, have a high-level of interest and offer strong continuing educational content. 

Over 285 qualified engineers attended the sponsored tutorials during DVCon 2017. Tutorial sponsors reached a captive audience during the half-day educational sessions and had the opportunity to follow-up with them during breaks, at the exhibits, and following the event.

DVCon is a highly targeted venue for engineers addressing major design and verification issues. You can position your company at the forefront of these discussions by sponsoring either of the Tutorials listed below. Submit proposals by September 29, 2017

DVCON SPONSORED TUTORIAL WITH LUNCHEON: $17,500

Sponsorship Includes:

  • Complimentary 8x10 booth on the Exhibit Floor
  • Company content specific, individualized Luncheon
  • Ability to collect contact information from the Sponsored Luncheon attendees
  • Copy of the 2017 and 2018 Attendee Lists (no email addresses)
  • Copy of the Sponsored Tutorial Attendee List (email addresses included)
  • Tutorial and Luncheon content will be publicized via monthly newsletters, DVCon website, Conference Program and in the Opening Session presentation slides
  • 1 dedicated email distribution to the DVCon mail list
  • Other promotional items like banners, flyers, gift items, etc. can be distributed at these two events
  • Presenters for the tutorial and lunch are entitled to a complimentary one-day registration
  • Up to 10 complimentary one-day registrations for the tutorial or lunch presentation

DVCON SPONSORED TUTORIAL: $10,500

Sponsorship Includes:

  • 10 minute commercial presentation during the tutorial
  • Complimentary 8x10 booth on the Exhibit Floor
  • Copy of the 2017 and 2018 Attendee Lists (no email addresses)
  • Copy of the Sponsored Tutorial Attendee List (email addresses included)
  • Tutorial content will be publicized via monthly newsletters, DVCon website, Conference Program and in the Opening Session presentation slides
  • 1 dedicated email distribution to the DVCon mail list
  • Other promotional items like banners, flyers, gift items, etc. can be distributed during the Tutorial
  • Presenters for the tutorial are entitled to a complimentary one-day registration
  • Up to 5 complimentary one-day registrations for the tutorial

TUTORIAL PROPOSAL REQUIREMENTS

DVCon tutorials are open to all attendees and are included in the full conference registration. Please include in the proposal the name of the companies that will be sponsoring the tutorial.

  • Attendee expectations are high regarding currency of topic, depth of engineering content and breadth of real-life examples
  • The Tutorial Chair will review final presentation materials to ensure high quality educational content
  • Include suggested presenters names, affiliations and biographies.
  • Your proposal should be a short abstract of the tutorial, two to five paragraphs, 1,000 words maximum
  • Presentation slides need to be supplied in an electronic format in advance of the conference. Presentation slides will be distributed to the attendees in electronic format. Hard copies will not be provided
  • Please indicate if this tutorial is a “hands-on” session or lecture format
  • Any necessary additional hardware that you may require must be provided by the tutorial organizers

SUGGESTED TOPICS

  • SystemVerilog for Verification and/or Design
  • SystemC /C/C++ Design and/or Verification of systems.
  • SoC and Software-driven Verification
  • Assertion-based Verification. SystemVerilog Assertions, PSL, etc.
  • Coverage-driven Verification
  • High-level Synthesis
  • Low-power Design and Verification techniques
  • Secure/Encrypted IP-based SoC design methods
  • Debug for design and verification
  • Mixed-signal modeling and verification
  • Transaction Level Modeling (TLM), ESL Design, and IP integration (IP-XACT)
  • Functional Safety
  • Security
  • Embedded software verification
  • Hardware/Software Co-development
  • Verification Productivity Methods
  • Formal Methodology and Static Analysis
  • Emulation
  • Post SI Debug
  • FPGA Prototyping
  • Moving from proprietary solutions to standards-based design and verification
  • Portable Stimulus

CONFERENCE SCHEDULE

  • Monday, February 26: Accellera Day Tutorials, Exhibits
  • Tuesday, February 27: Technical Sessions, Keynote Speaker, Exhibits
  • Wednesday, February 28: Technical Sessions, Panel Discussions, Exhibits
  • Thursday, March 1: Tutorials and Short Workshops

TUTORIAL DEADLINES

  • September 29, 2017: Proposals due. Submit at DVCon.org
  • November 2, 2017: Accept/Reject Notification
  • November 20, 2017: All Tutorial content due for Conference Program and website: tutorial title, abstract, speaker names, affiliations, and biographies
  • January 18, 2018: Draft Presentation slides due to DVCon Tutorial Chair
  • February 1, 2018: Presentation feedback due to presenters on slides
  • February 13, 2018: Final slides due for final production for attendee distribution

General Chair Dennis Brophy, Mentor , A Seimens Business dennis_brophy@mentor.com
Tutorial Co-Chair Aparna Dey, Cadence Design Systems, Inc. aparna@cadence.com

SPONSORED BY: Accellera Systems Initiative is an industry consortium with a mission to provide design and verification standards required by systems, semiconductor, IP, and design tool companies to enhance a front-end design automation process. Accellera.org