February 29 - March 3, 2016

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.

TUESDAY March 04, 12:00pm - 1:15pm | Pine/Cedar Ballroom

System to Silicon Verification - Challenges & Solutions

Frank Schirrmeister - Cadence Design Systems, Inc.
Kristin Lietzke - Cadence Design Systems, Inc.

Yet again, the industry is at the edge of significant changes to verification. Escalating challenges like verification of performance, how power budgets are met and how hardware and software interact are pushing the envelope for more efficient verification and verification re-use across abstraction levels and different verification engines. Join us for a System-to-Silicon Verification Luncheon at DVCon in San Jose.

Industry experts including EDA visionary and investor James Hogan will present and debate the direction of system verification. Selected users will detail how they’ve solved some of today’s hardest challenges in system and silicon verification. This luncheon will provide an unprecedented opportunity to hear first hand from peers and colleagues how they tackled the toughest verification issues, to network with your peers, and to collaborate with industry experts. Whether your challenge relates to performance, productivity, or accuracy, this luncheon will present you with new perspectives on improving quality while meeting demanding product schedules.
James Hogan - Consultant

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