March 2-5, 2020

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.

MONDAY March 03, 2:00pm - 5:30pm | Pine/Cedar

Experience the Next ~Wave~ of Analog and Digital Signal Processing Using SystemC AMS 2.0

Karsten Einwich - Fraunhofer IIS, Institutsteil EAS
François Pêcheux - Univ. Pierre et Marie Curie
Martin Barnasconi - NXP Semiconductors
Torsten Mähne - Univ. Pierre et Marie Curie
Martin Barnasconi - NXP Semiconductors
Today’s embedded systems and SoCs contain more and more physical interface IPs (e.g. USB, PCIe, DDR, SATA and HDMI) and mixed-signal IP (e.g. Sigma-delta-ADCs, DACs and PLLs) which directly interact with the digital HW/SW subsystems. For example, many of these mixed-signal IP’s are registered-controlled and can be configured and calibrated via the on-chip processor.

Furthermore, while data-rates continue to increase, design of these high-speed peripherals requires inclusion of the analog/mixed-signal behavior in the overall signal processing chain to guarantee error-free transmission and reception over the physical channels. This requires new means to model and simulate the algorithms and signal processing capabilities of these peripherals, in combination with the HW/SW subsystems at functional and architecture level. Especially for this purpose, the SystemC language standard has been extended with powerful mixed-signal and signal processing modeling features to tackle the challenges in heterogeneous electronic system-level design and verification.

This tutorial will be conducted as a true “hands-on” session: after a basic introduction on the SystemC AMS 2.0 modeling concepts and methodology, everyone is encouraged to actually create models, run simulations and look at waveforms! To facilitate this, information distribution will be made available for the attendees, including a fully prepared system-level modeling environment, which they can run immediately on their own laptop.

In an interactive way, presentations and “labs” will be alternated introducing both analog and digital signal processing exercises, giving the attendees a valuable introduction of the existing and new features of SystemC AMS. Examples are the creation of analog filters, analog-to-digital converters and completion of a transceiver system using digitally modulated signals.

This highly technical tutorial targets system engineers, integrators, architects and verification engineers active in industrial projects where analog and digital signal processing functionality comes together and where interoperability between mixed-signal and HW/SW subsystems becomes apparent. Note that the tutorial does not target analog/mixed-signal circuit-level and mixed transistor/RTL modeling; instead, it will focus on abstract mixed-signal modeling for system-level design and verification. Therefore experience with algorithm and C/C++/SystemC languages is highly preferred.

So in case you are interested to experience the next ~wave~ of analog and digital signal processing using SystemC AMS? Join us at DVCon 2014!

Speakers and trainers in this workshop are recognized leaders in the field of mixed-signal system-level modeling:
  • Karsten Einwich, Fraunhofer IIS/EAS Dresden, Germany - Creator of the SystemC AMS compliant proof-of-concept implementation
  • François Pêcheux, University Pierre et Marie Curie, Paris, France - Leader in scientific innovation using SystemC AMS for RF, communication and biomedical applications
  • Martin Barnasconi, NXP Semiconductors, Eindhoven, The Netherlands - Driving SystemC AMS standardization in the Accellera Systems Initiative from an industrial perspective and chair of the SystemC AMS Working Group.

Similar sessions have been organized in Europe at major conferences and events. The organizer and speakers would like to bring the success of SystemC AMS in Europe to other regions of the world.