March 2-5, 2020

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.

MONDAY March 02, 9:00am - 12:00pm | Fir

Automating Design and Verification of Embedded Systems Using Meta-Modeling and Code Generation Techniques

Michael Velten - Infineon Technologies AG
Rainer Findenig - Intel Corp.
Daniel Müller-Gritscheneder - Technische Univ. München
Wolfgang Mueller - C-Labs Corp.
Wolfgang Ecker - Infineon Technologies AG
The tutorial presents the application of the known SW development methodology “Meta-Modeling and Code Generation” to the design of SOCs, mainly the semi-automated generation of SystemC prototypes, firmware and hardware (RTL, Schematic) as well as verification measures such as elements of a SystemVerilog UVM testbench or SVA properties for those. Therefore, it fits the scope of DVCon exactly which covers the mentioned description styles as well as testbench automation and high-level synthesis and is therefore from high interest for the engineers attending DVCon. With IP-XACT and UML it also covers standards widely used in ESL design.

Meta-Modeling opens a complete new modeling space for hardware designers. Instead of thinking in models-of-computation or description languages, the designers think and model in terms of things, attributes of these things and their relationships. The description of involved things, attributes, and relationships is described in a so called Meta-Model. A Model, being an instance of a Meta-Model describes one specific thing with its sub-elements, attribute values and relation settings.

Also parts of existing Meta-Model definitions as from UML, SysML, or IP-XACT can be used to define the structure of the models. Often parts of the model can be extracted from specification and thus consistency in the design process can be improved. When having built a model, code can be generated from that model. This can be done via hand coded generators or template engines.

The tutorial (a detailed structure available on request) starts with the introduction of Meta-Modeling concepts and techniques and shows that Meta-Modeling has already over 20 years of history in hardware design. Next follows the presentation of standard Meta-Models in the hardware domain and the discussion of their application. The tutorial ends with a set of application examples, each of which can be directly utilized by attendees since they are based on open-source Eclipse and XML technologies.

The tutorial is prepared and given by design, verification, as well as (meta-) modeling experts, which work for globally known companies, research institutes, and universities. This mix ensures a depth of engineering content and breadth of real-life examples and thus provides a high value to the attendees.