February 27 - March 2, 2017

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.

TUESDAY March 03, 10:30am - 12:00pm | Gateway Foyer
EVENT TYPE: POSTER SESSION

SESSION 4P
Poster Session
Chair:
Shankar Hemmady - Synopsys, Inc.

4P.1Goldilocks and System Performance Modeling - A SystemVerilog Adaptive Rate Control (ARC) Stimulus Generation Methodology
 Speaker: Rich Edelman - Mentor Graphics Corp.
 Authors: Rich Edelman - Mentor Graphics Corp.
Shashi Bhutada - Mentor Graphics Corp.
4P.2Verification Environment Automation from RTL
 Speaker: Kei-Wang Yiu - MediaTek, Inc.
 Authors: Zhidong Chen - MediaTek, Inc.
Yunyang Song - MediaTek, Inc.
Wenting Hou - MediaTek, Inc.
Junna Qiao - MediaTek, Inc.
Junxia Wang - MediaTek, Inc.
Ling Bai - MediaTek, Inc.
Kei-Wang Yiu - MediaTek, Inc.
4P.3Matrix Math Package for VHDL
 Speaker: David W. Bishop - Intrinsix Corp.
 Author: David W. Bishop - Intrinsix Corp.
4P.4Closing Functional and Structural Coverage on RTL Generated by HLS
 Speaker: Bryan Bowyer - Calypto Design Systems, Inc.
 Author: Bryan Bowyer - Calypto Design Systems, Inc.
4P.6Testpoint Synthesis Using Symbolic Simulation
 Speaker: Chris Browy - Avery Design Systems, Inc.
 Authors: Kai-Hui Chang - Avery Design Systems, Inc.
Yen-Ting Liu - Avery Design Systems, Inc.
Chris Browy - Avery Design Systems, Inc.
4P.7Design and Verification of a Multichip Coherence Protocol
 Speaker: Shahid Ikram - Cavium, Inc.
 Authors: Shahid Ikram - Cavium, Inc.
Isam Akkawi - Cavium, Inc.
David Asher - Cavium, Inc.
Rick Kessler - Cavium, Inc.
Jim Ellis - Cavium, Inc.
4P.8Jump-Start Software-Driven Hardware Verification with a Verification Framework
 Speaker: Matthew Ballance - Mentor Graphics Corp.
 Author: Matthew Ballance - Mentor Graphics Corp.
4P.9Not Just for Hardware Debug: Prototype Debuggers for System Validation and Optimization
 Speaker: Michael Sachtjen - Mentor Graphics Corp.
 Authors: Michael Sachtjen - Mentor Graphics Corp.
Joe Gaubatz - Mentor Graphics Corp.
4P.10Successive Refinement: A Methodology for Incremental Specification of Power Intent
 Speaker: Erich Marschner - Mentor Graphics Corp.
 Authors: Erich Marschner - Mentor Graphics Corp.
John Biggs - ARM Ltd.
Adnan Khan - ARM Ltd.
Eamonn Quigley - ARM Ltd.
4P.11SystemVerilog Constraint Layering via Reusable Randomization Policy Classes
 Speaker: John Dickol - Samsung Austin R&D Center
 Author: John Dickol - Samsung Austin R&D Center
4P.12Versatile UVM Scoreboarding
 Speaker: Peter Jensen - SyoSil ApS
 Authors: Jacob S. Andersen - SyoSil ApS
Peter Jensen - SyoSil ApS
Kevin K. Steffensen - SyoSil ApS
4P.13Automatic Partitioning for Multi-Core HDL Simulation
 Speaker: Mohit Sinha - Cadence Design Systems, Inc.
 Authors: Gaurav Kumar - Cadence Design Systems, Inc.
Sandeep Pagey - Cadence Design Systems, Inc.
Mohit Sinha - Cadence Design Systems, Inc.
Manu Chopra - Cadence Design Systems, Inc.
4P.15Want a Boost in Your Regression Throughput? Simulate Common Setup Phase Only Once
 Speaker: Rohit K. Jain - Mentor Graphics Corp.
 Authors: Rohit K. Jain - Mentor Graphics Corp.
Shobana Sudhakar - Mentor Graphics Corp.
4P.16Virtual Test: Simulating ATE Vectors in a System Verilog Testbench for Faster Time to Market
 Speaker: John Mackintosh - Analog Devices, Inc.
 Authors: Matthew Borto - Analog Devices, Inc.
Cecil Stone - Analog Devices, Inc.
David Brownell - Analog Devices, Inc.
Courtney Fricano - Analog Devices, Inc.
4P.17Designing Portable UVM Test Benches for Reusable IPs
 Speaker: Baosheng Wang - Advanced Micro Devices, Inc.
 Authors: Xiaoning Zhang - Advanced Micro Devices, Inc.
Terry Li - Advanced Micro Devices, Inc.
Baosheng Wang - Advanced Micro Devices, Inc.
Karl Whiting - Advanced Micro Devices, Inc.
4P.18Taming a Complex UVM Environment
 Speaker: Manjunath Shetty - Broadcom Corp.
 Authors: Manjunath Shetty - Broadcom Corp.
Ramamurthy Gorti - Broadcom Corp.
4P.19Wrapping Verilog Bus Functional Model (BFM) and RTL as Drivers in Customized UVM VIP Using Abstract Classes
 Speaker: Thomas Bodmer - Advanced Micro Devices, Inc.
 Authors: Roman Wang - Advanced Micro Devices, Inc.
Thomas Bodmer - Advanced Micro Devices, Inc.
4P.20A Simplified and Reusable UVM Config DB Methodology for Environment Developers and Test Writers Alike
 Speaker: Robert D. Oden - Mentor Graphics Corp.
 Author: Robert D. Oden - Mentor Graphics Corp.
4P.21Are You Smarter Than Your Testbench? With a Little Work You Can Be
 Speaker: Rich Edelman - Mentor Graphics Corp.
 Authors: Rich Edelman - Mentor Graphics Corp.
Raghu Ardeishar - Mentor Graphics Corp.
4P.22Randomizing UVM Config DB Parameters
 Speaker: Jeremy Ridgeway - Avago Technologies
 Author: Jeremy Ridgeway - Avago Technologies
4P.23Coverage Data Exchange Is No Robbery, Or Is It?
 Speaker: Samiran Laha - Mentor Graphics Corp.
 Authors: Darron K. May - Mentor Graphics Corp.
Samiran Laha - Mentor Graphics Corp.
Thom Ellis - Mentor Graphics Corp.
4P.24Conditional Delays for Negative Limit Timing Checks in Event Driven Simulation
 Speaker: Nadeem A. Kalil - Cadence Design Systems, Inc.
 Authors: Nadeem A. Kalil - Cadence Design Systems, Inc.
David Roberts - Cadence Design Systems, Inc.
4P.26Git For Hardware Designers
 Speaker: Sanjeev P. Singh - Juniper Networks, Inc.
 Authors: Sanjeev P. Singh - Juniper Networks, Inc.
Jeffery Scott - Juniper Networks, Inc.
4P.27The Big Brain Theory - Visualizing SoC Design & Verification Data
 Speaker: Gordon Allan - Mentor Graphics Corp.
 Author: Gordon Allan - Mentor Graphics Corp.
4P.28Meta Design Framework: Building Designs Programmatically
 Speaker: Sanjeev P. Singh - Juniper Networks, Inc.
 Authors: Sanjeev P. Singh - Juniper Networks, Inc.
Jonathan Sadowsky - Juniper Networks, Inc.
4P.29Highly Configurable UVM Environment for Parameterized IP Verification
 Speaker: HongLiang Liu - Advanced Micro Devices, Inc.
 Authors: HongLiang Liu - Advanced Micro Devices, Inc.
Karl Whiting - Advanced Micro Devices, Inc.
4P.31Debug Challenges in Low-Power Design and Verification
 Speaker: Chuck Seeley - Mentor Graphics Corp.
 Authors: Durgesh Prasad - Mentor Graphics (India) Pvt. Ltd.
Madhur Bhargava - Mentor Graphics (India) Pvt. Ltd.
Jitesh Bansal - Mentor Graphics (India) Pvt. Ltd.
Chuck Seeley - Mentor Graphics Corp.
4P.32The UPF 2.1 Library Commands: Truly Unifying the Power Specification Formats
 Speaker: Amit Srivastava - Mentor Graphics (India) Pvt. Ltd.
 Authors: Amit Srivastava - Mentor Graphics (India) Pvt. Ltd.
Awashesh Kumar - Mentor Graphics (India) Pvt. Ltd.
Vinay Singh - Mentor Graphics (India) Pvt. Ltd.
4P.33Next-Generation Power Aware CDC Verification – What Have We Learned?
 Speaker: Kurt Takara - Mentor Graphics Corp.
 Authors: Kurt Takara - Mentor Graphics Corp.
Chris Kwok - Mentor Graphics Corp.
Anindya Chakraborty - Mentor Graphics (India) Pvt. Ltd.
Naman Jain - Mentor Graphics (India) Pvt. Ltd.
Ashish Hari - Mentor Graphics (India) Pvt. Ltd.
4P.34Automation of Power On Reset Assertion
 Speaker: Shang-Wei Tu - MediaTek, Inc.
 Authors: Shang-Wei Tu - MediaTek, Inc.
Joydeep Gangopadhyay - Synopsys India Pvt. Ltd.
Amol Herlekar - Synopsys India Pvt. Ltd.
Penny Yang - MediaTek, Inc.
4P.35PA-APIs: Looking Beyond Power Intent Specification Formats
 Speaker: Amit Srivastava - Mentor Graphics (India) Pvt. Ltd.
 Authors: Amit Srivastava - Mentor Graphics (India) Pvt. Ltd.
Awashesh Kumar - Mentor Graphics (India) Pvt. Ltd.
4P.36Let's DisCOVER Power States
 Speaker: Jitesh Bansal - Mentor Graphics (India) Pvt. Ltd.
 Authors: Pankaj K. Dwivedi - Mentor Graphics (India) Pvt. Ltd.
Amit Srivastava - Mentor Graphics (India) Pvt. Ltd.
Veeresh Singh - Mentor Graphics (India) Pvt. Ltd.