February 27 - March 2, 2017

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.
WEDNESDAY March 01, 1:30pm - 2:30pm | Oak/Fir
EVENT TYPE: PANEL
SESSION 28
SystemVerilog Jinxed Half My Career: Where Do We Go From Here?
Moderator:
Jonathan Bromley - Verilab Ltd.
Organizer:
Jonathan Bromley - Verilab Ltd.
SystemVerilog will be pretty close to 15 years old at the time of DVCon-2017 (the first rumblings on the eda.org email reflectors date from spring 2002). There are plenty of working verification engineers who have used little else. This panel session calls SystemVerilog’s hegemony into question from several viewpoints. Has it provided our industry with the best we could have wished for? Has the huge R&D investment by tool vendors been justified? What kind of language or environment can we look forward to as SystemVerilog’s ultimate replacement, and how much appetite does the industry have for any such change? A panel of expert users, implementers and other stakeholders will bring their combined experience to this discussion. Expect strongly held views, radical alternative suggestions, and insights into how the needs of our industry will be served – and maybe not served – by our choice of programming languages.

Panelists:
Cliff Cummings - Sunburst Design, Inc.
Phil Moorby - Montana Systems, Inc
Dave Rich - Mentor Graphics Corp.
Arturo Salz - Synopsys, Inc.
Adam Sherer - Cadence Design Systems, Inc.