MP Associates, Inc.

TUESDAY February 27, 3:00pm - 4:30pm | Monterey/Carmel
EVENT TYPE: REGULAR SESSION

SESSION 7
UVM 1: Registers and Integration
Chair:
Kelly Larson - Design Verification Trade Association
Handling tricky verification problems with UVM.

7.1Simpler Register Model Package for UVM Testbenches
 Speaker: Sanjeev P. Singh - Juniper Networks, Inc.
 Author: Sanjeev P. Singh - Juniper Networks, Inc.
7.2Deploying Customized Solution for Graphics Registers with UVM1.2 RAL
 Speaker: Roman Wang - Advanced Micro Devices, Inc.
 Authors: Roman Wang - Advanced Micro Devices, Inc.
Jia Zhu - Advanced Micro Devices, Inc.
Nigel Wang - Advanced Micro Devices, Inc.
Robert Liu - Advanced Micro Devices, Inc.
Lunping Guo - Advanced Micro Devices, Inc.
7.3My Testbench Used to Break! Now it Bends: Adapting to Changing Design Configurations
 Speaker: Jeffery S. Vance - Verilab, Inc.
 Authors: Jeffery S. Vance - Verilab, Inc.
Jeffrey Montesano - Verilab, Inc.
Kevin Vasconcellos - Verilab, Inc.
Kevin Johnston - Verilab, Inc.