March 2-5, 2020

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.

WEDNESDAY February 28, 10:00am - 12:00pm | Fir
EVENT TYPE: REGULAR SESSION

SESSION 9
Formal Verification Use Models
Chair:
Harry Foster - Mentor, A Siemens Business
Applying formal verification to challenging system-level problems.

9.1An Efficient and Modular Approach for Formally Verifying Cache Implementations
 Speaker: Erik Seligman - Intel Corp.
 Authors: Achutha Kiran Kumar V. Madhunapantula - Intel Corp.
Abhijith A. Bharadwaj - Intel Technology India Pvt. Ltd.
Bindumadhava S. Singanamalli - Intel Corp.
9.2Architectural Formal Verification of System-Level Deadlocks
 Speakers: Vigyan Singhal - Oski Technology, Inc.
Mandar Munishwar - Qualcomm Technologies, Inc.
 Authors: Mandar Munishwar - Qualcomm Technologies, Inc.
Naveed Zaman - Qualcomm Technologies, Inc.
Anshul Jain - Oski Technology, Inc.
HarGovind Singh - Oski Technology, Inc.
Vigyan Singhal - Oski Technology, Inc.
9.3Formal Architectural Specification and Verification of a Complex SoC
 Speaker: Shahid Ikram - Cavium
 Authors: Shahid Ikram - Cavium
Isam Akkwai - Cavium
David Asher - Cavium
Jim Ellis - Cavium
9.4Formal Verification of Connections at SoC-level
 Speaker: Penny Yang - Synopsys Taiwan Co., Ltd.
 Authors: Penny Yang - Synopsys Taiwan Co., Ltd.
Prasun Das - Synopsys India Pvt. Ltd.
Yuya Kao - MediaTek, Inc.
Mingchu Kuo - MediaTek, Inc.