February 25-28, 2019

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.
TUESDAY February 26, 3:00pm - 4:30pm | Oak
The Universal Verification Methodology (UVM)
Neel Sonara - Broadcom Corp.
Tips and tricks to make better use of the Universal Verification Methodology.

5.1UVM IEEE Shiny Object
The UVM IEEE standard has been published for some time and the first implementation library is released. This paper will explore the changes from UVM 1.2 and UVM 1.1d to understand what might need to be changed for an existing testbench and what value there is to do so. Worked examples will demonstrate how to integrate with UVM- 1800.
 Speaker: Moses Satyasekaran - Mentor, A Siemens Business
 Authors: Rich Edelman - Mentor, A Siemens Business
Moses Satyasekaran - Mentor, A Siemens Business
5.2Synchronicity: Bringing Order to SystemVerilog/UVM Synchronizing Chaos
SystemVerilog and UVM provide several mechanisms to synchronize verification components. The native SystemVerilog synchronization constructs (fork-join, events, etc.) are understood, but sometimes used inefficiently. UVM introduces more powerful classes for synchronization. However, being more complex they are not fully understood or only a portion of their capabilities are used efficiently. This paper provides clear explanations of all the synchronization mechanisms available to verification engineers for both native SystemVerilog and the UVM class library. We provide examples of how to use the synchronization mechanism effectively, along with guidelines on how to choose the best mechanism for your requirements.
 Speaker: Bryan Morris - Ciena, Corp.
 Author: Bryan Morris - Ciena, Corp.
5.3Fun with UVM Sequences – Coding and Debugging
In the UVM, most activity is generated from writing sequences. This paper will outline how to build and write basic sequences, and then extend into more advanced usage. The reader will learn about sequences that generate sequence items; sequences that cause other sequences to occur and sequences that manage sequences on other sequencers. Sequences to generate out of order transactions will be investigated. Self-checking sequences will be written.
 Speaker: Rich Edelman - Mentor, A Siemens Business
 Author: Rich Edelman - Mentor, A Siemens Business