WEDNESDAY March 04, 1:30pm - 2:30pm | Oak/Fir
AI, deep learning, high-performance compute, and automotive are all new and complex applications for chips, and all straining today’s verification environment. Moving into the future, it’s unclear if the current and traditional verification backbone will support applications like these or even more sophisticated applications to come or the emerging open-source design trends.
Moderator Jean-Marie Brunet from Mentor, a Siemens Business, will take a panel of verification experts on an exploration of what the verification environment of the future will look like. They will attempt to predict the longevity of simulation and formal verification and determine how far emulation will be able to extend through the entire verification flow. The role of standards will be addressed, as will when analog will have a place in digital functional verification.