March 2-5, 2020

DoubleTree Hotel, San Jose, CA

MP Associates, Inc.

THURSDAY March 05, 1:00pm - 2:30pm | Cascade
KEYWORD: SOC AND SOFTWARE-DRIVEN VERIFICATION
EVENT TYPE: SHORT WORKSHOP

SESSION 7SW
The Exascale Debug Challenge – Time to Leave Old Debug Methods Behind

Speakers:
Ribhu Mittal - Synopsys, Inc.
Melvyn Goveas - Synopsys, Inc.
Today’s chips have multi-billion gate complexity and have to execute billions of test cycles before tapeout. Billions of gates times billions of test cycles, equals an exascale challenge, and requires new thinking for debugging of hardware and software. The old emulation paradigm of run-stop-dump-debug that has been in use for 20+ years is hitting the wall with due to the complexity of exascale debug. In this workshop you will learn about a more effective debug methodology that advances the debug abstraction to the system-level and considers a higher-level view of the system behavior compared to just looking at signal behavior in waveforms. In addition to covering the methodology, we will share a realistic case study to demonstrate how to find deeply hidden hardware and software bugs in your design. Audience: Verification engineers using emulation for debug. Verification managers and project managers looking to improve project schedules.

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