Enhanced Dynamic Hybrid Simulation Framework for Hardware-Software Verification
The hardware-software co-verification feasibility constitutes a significant challenge to the System-on-Chip (SoC) development. A comprehensive co-simulation can take months, if not years of CPU time. To solve this problem, a hybrid approach was introduced several years ago. The motivation to use it derives from its ability to address the contradiction between hardware and software development requirements. On the one hand, the software is more attractive to accelerate the simulation and does not require high accuracy all the time. On the second hand, the hardware development relies mainly on a time-aware simulation and can only sacrifice precision occasionally. This paper presents an enhanced dynamic hybrid framework that can satisfy both parties and may be used for hardware-software co-verification.