Leveraging Virtual Platforms to Shift-Left Software Development and System Verification
Cadence Design Systems
Achieving necessary throughput gains in modern semiconductor development requires new methodology thinking. The concept of “Shift-Left,” where development content is composed as early in the process as possible, holds great promise. But given the range of content that is required in a modern SoC, coordinating these activities is a complex task. All too often the development process becomes serialized, driving schedule elongation and risky debug loops.
What is required is a common platform that allows the early development of the various SoC components in parallel. Virtual platforms have proven an effective method for architects, designers, software engineers and verification specialists to collaborate during the design process enabling pre-silicon software development and validation. However, setting these environments up requires some specific knowledge.
This workshop uses an example of early firmware development to introduce the participants to the careful planning and implementation needed to build an environment that works for all teams. Key complexities around rapid creation of models with the right balance of functionality, timing and performance are introduced and management techniques are reviewed. Emphasis is placed on the value of a consistent and coordinated debug and configuration environment to interface the Virtual Platform with software environments and to maximize performance.
This workshop will provide participants with an overview of SoC modeling, tool and content interfacing, working with a platform to enable software development, and reusing the virtual platform in a hybrid mode with hardware verification solutions. Methodology aspects will also be explained to allow for appropriate configurations of the Virtual Platform for various environment requirements and constraints.