Mixed-signal Functional Verification Methodology for embedded Non-volatile Memory using ESP simulation

IP verification is one of the key feature of Foundry business. This is because only sufficiently validated IPs can guarantee the robustness of system level operation. However, mixed-signal IPs are hard to verify and most of them are not supported by EDA tools. From this paper, we will introduce our mixed-signal IP verification method using netlistextraction, module conversion techniques and ESP symbolic simulation. We used two types of memory to verify our methodology. One is eFLASH memory which is most commonly used in foundry business and the other is eMRAM which is the state-of-art emerging NVM. Our proposed method enables various types of mixed-signal IPs for existing EDA tool and provides effective verification environment.

SangGi Do, Samsung Electronics
Jieun Park, Samsung Electronics
Dohui Kim, Samsung Electronics
Jungkyu Jang, Samsung Electronics