8:00am - 12:00pm
Tutorial 5: Advanced, High-Throughput Debug from Architectural Modeling Through Post-Silicon SoC Validation
Tutorial 6: Applying “Re-Use” Principles with an Open Debug Environment to Shrink SoC Schedules and Budgets
Tutorial 7: Verification 501: Graduate-Level Debug Tutorial
2:00pm - 5:30pm
Tutorial 8: Dead or Alive: Using Automated Formal Techniques to Characterize Dead Code, Reveal Paths to Hit Uncovered States, and Reach Coverage Closure Faster
Tutorial 9: High Performance Emulation for SoC Verification and Early Software Bring-Up
12:30 - 1:30pm
Mastering Verification and Debug Productivity
Location: Bayshore Ballroom
In this luncheon session, we will invite industry verification experts to join us in a panel discussion to highlight their overall SoC verification and debug challenges as well as some of the solutions/debug methodologies that they have adopted to improve their overall productivity, including SoC level verification.
DVCON VIRTUAL RESOURCES
Visit the Virtual Resource Center to access tutorial slides and proceedings.