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The Design & Verification Conference & Exhibition is the premier conference for functional design and verification, focused on bringing information from the leading edge of technology, techniques, standards and methods.

TECHNICAL PROGRAM

Monday Tutorials
NASCUG Users Group Meeting
Luncheon Sponsored by Accellera Systems Initiative

 

 

Tuesday Sessions
Poster Session
Luncheon Sponsored by Cadence
Big Wigs Panel
Coffee Break

DVCon Expo

 

Wednesday Sessions
Poster Session
Luncheon Sponsored by Synopsys
Keynote Address
Panel
Reception

DVCon Expo

 

Thursday Tutorials
Luncheon Sponsored by Jasper

 

KEYNOTE PRESENTATION

Aart de Geus
Chairman of the Board and
Chief Executive Officer

Synopsys, Inc.
Advance Program PDF - Download
As of Dec. 2, 2011

Size: 12.3MB
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