DoubleTree by Hilton Hotel San Jose, San Jose, CA, USA
FEBRUARY 27 – MARCH 2, 2023
The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees to adopt similar techniques to improve their own design and verification flows.
Important Dates
July 11, 2022
Submission Site Opens
August 8, 2022
Abstract Submission Deadline
September 9, 2022
Preliminary Accept/Reject
October 14, 2022
Draft Paper Due
October 28, 2022
Final Paper Due
November 18, 2022
Final Paper Accept/Reject
February 27, 2023
DVCon U.S. 2023 Begins
March 2, 2023
DVCon U.S. 2023 Ends
Call for extended abstracts
Call for Sponsored Tutorials
Call for Panels
Call for Short Workshops
Example Topics
VERIFICATION & VALIDATION
Advanced methodologies and test-benches
Verification processes, regressions and resource management
Debug and analysis of complex designs
Multi-language design and verification
Hardware/Software co-design and co-verification of embedded systems
SAFETY-CRITICAL DESIGN
& VERIFICATION
Verification and DO-254 compliance
Automotive ISO 26262 Design and Verification Challenges
Medical or Industrial Verification Challenges
Requirements-Driven Verification Methodologies
IP protection and security
DESIGN AND VERIFICATION REUSE & AUTOMATION
Bridging verification and validation across multiple engines
SoC and IP integration methods and tools
Applications of the Accellera Portable Stimulus Standard
Configuration management of IP and abstraction levels
