Abstract:
Goldman Sachs estimates that up to 25% of jobs in the US and a staggering 300 million jobs globally will be affected by generative AI. As contributors to the semiconductor industry, we find ourselves both accelerating and being impacted by this transformative trend. While AI and machine learning have already made strides in verification, the advent of Generative AI, particularly Large Language Models (LLMs), introduces fresh possibilities for enhancing verification productivity through acceleration, automation, and heightened accuracy. However, the critical question remains – can these promises materialize?
Many verification teams have either integrated LLMs into their daily workflows or are in the planning stages to do so. Simultaneously, concerns linger around data privacy, potential job displacement, and role changes. This panel invites participants to share and discuss their perspectives, experiences, insights, and apprehensions regarding the role of generative AI in verification. By doing so, the panel aims to offer the audience a glimpse into the future of verification, driven by LLMs, which is rapidly approaching.
Panel Participants:
- Moderator:
- Harry Foster, Chief Scientist Verification, Siemens EDA
- Panelists:
- Erik Berg, Principal SoC Verification Engineer, Microsoft
- Daniel Schostak, Verification Architect & Fellow, ARM
- Mark Ren, Director of Design and Automation Research, NVIDIA
- Dan Yu, AI/ML Solutions Manager, Siemens EDA