• As AI chips evolve from specialized accelerators to complex heterogeneous systems, they present unique verification challenges: massive parallel computation units, dynamic data flow architectures, and intricate power management schemes. Additionally, verifying AI-specific features like numerical precision, training/inference modes, and complex memory hierarchies demands novel approaches. 

    This panel brings together verification experts from diverse industry segments to share their experiences and insights. Encompassing established semiconductor companies, Hyperscalers, innovative startups at different stages, and EDA technologists, our panellists will explore how different business models and market demands shape their verification strategies. 

    The panelists will debate key questions such as coverage metrics for AI workloads, verification reuse across multiple configurations, system-level aspects, and the balance between traditional verification methods –including functional verification, formal methods, virtual prototyping, and emulation - as well as the potential for AI-assisted approaches.

    Panel Organizer and Moderator: 

    • Moshe Zalcberg, CEO, Veriest Solutions

    Panelists:

    • Harry Foster, Chief Scientist Verification, Siemens EDA (EDA)
    • Ahmad Ammar, Technical Lead, AIM (AI, Infrastructure, and Methodology), AMD
    • Stuart Lindsay, Principal HW EDA Methodology Engineer, Groq 
    • Shahriar Seyedhosseini, Generalist Engineer, MatX
    • Shuqing Zhao, Formal Verification Lead, Meta

    The panel will take place Wednesday, Feb/26th, 9:00 - 10:00.