Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.

Are AI Chips Harder to Verify?

Wednesday, February 26, 2025 9:00 am — 10:00 am

Harry Foster, Chief Scientist Verification, Siemens EDA (EDA); Ahmad Ammar, Technical Lead, AIM (AI, Infrastructure, and Methodology), AMD; Stuart Lindsay, Principal HW EDA Methodology Engineer, Groq; Shahriar Seyedhosseini, Generalist Engineer, MatX; Shuqing Zhao, Formal Verification Lead, Meta

As AI chips evolve from specialized accelerators to complex heterogeneous systems, they present unique verification challenges: massive parallel computation units, dynamic data flow architectures, and intricate power management schemes. Additionally, verifying AI-specific features like numerical precision, training/inference modes, and complex memory hierarchies demands novel approaches.

This panel brings together verification experts from diverse industry segments to share their experiences and insights. Encompassing established semiconductor companies, Hyperscalers, innovative startups at different stages, and EDA technologists, our panellists will explore how different business models and market demands shape their verification strategies.

The panelists will debate key questions such as coverage metrics for AI workloads, verification reuse across multiple configurations, system-level aspects, and the balance between traditional verification methods –including functional verification, formal methods, virtual prototyping, and emulation - as well as the potential for AI-assisted approaches.

Panel Organizer and Moderator:

Moshe Zalcberg, CEO, Veriest Solutions