Kyoungmin Park, Samsung Electronics; Brad Budlong, Cadence Design Systems; Hyundon Kim, Samsung Electronics; Danny Yi, Cadence Design Systems; Gibs Lee, Cadence Design Systems; Jaehunn Lee, Samsung Electronics; Chulmin Kim, Samsung Electronics; Jaemin Choi, Samsung Electronics; Kijung Yoo, Samsung Electronics; Youngsik Kim, Samsung Electronics; Yogesh Goel, Cadence Design Systems; Seonil Brian Choi, Samsung Electronics
This paper introduces an innovative 4-State logic ('0', '1', 'X', 'Z') emulation technology and how we applied it to real mobile-AP SOC for power-aware verification for the first time in the emulation based verification world including requirements for successful adoption. And the results of the experiment compared with traditional simulation based verification. Also we share the experimental data about how much additional resources are needed for 4-State logic emulation compared with 2-State logic emulation.
