Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.
Nicholas Nuti, Intel Corporation; Srinivasan Jambulingam, Intel Corporation
Contemporary methods of validating SoC IP interoperability tend to be arduous and time-consuming because they lack a standardized functional validation methodology. An SoC is made of many interconnected IPs that can be developed and verified in isolated conditions. Lack of initial collaborative effort between IP teams can lead to increased validation complexity because IPs have varying simulation requirements and preexisting work must be modified to directly integrate other IPs. Direct IP integration in interoperability validation will require extended support from other teams during setup because simulations must be merged. Merging IP simulations can be difficult because projects may have imposing requisites. Further, a lack of a standardized and seamless integration method increases project duration and can cause validation teams to find bugs late in the overall development process due to delays. This paper discusses an unobtrusive and accessible method of multi-IP simulation with the aim of optimizing and simplifying the process of interoperability validation