Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.

1131: Towards Efficient Design Verification – Constrained Random Verification using PyUVM

Tuesday, March 5, 2024 11:00 am — 12:30 pm

Python, as a multi-paradigm language known for its ease of integration with other languages, has gained significant attention among verification engineers recently. Python-based verification environment capitalizes on open-source frameworks such as PyUVM providing (Python-based UVM 1.2 implementation) and PyVSC (facilitates constrained randomization and functional coverage). These libraries play a pivotal role in expediting test development and hold promise in reducing setup costs. The goal of this paper is to evaluate the effectiveness of PyUVM verification testbenches across various design IPs aiming a comprehensive comparison of their features and performance metrics with the established SystemVerilog-UVM methodology.