2025 Tutorials & Workshops

Sponsored Tutorial

Friday, February 7, 2025

• Next-Gen Verification Technologies for Processor-Based Systems

  9:00 am — 10:30 am • Workshop

  Ravindra Aneja, Synopsys Inc.; Xiaolin Chen, Synopsys Inc.; Aimee Sutton, Synopsys Inc.; Nilabja Chattopadhyay, Amazon.com LLC; Jevin Saju John, Synopsys Inc.; Bjoern Hartmann, Synopsys Inc.

  ---

  • 

Sponsored Workshops

Thursday, February 27, 2025

• Beyond Integers and Floating Point – Designing and Verifying with Alternate Number Representations

  9:00 am — 10:30 am • Workshop

  Russell Klein, HLS Program Director, Siemens EDA

  ---

  • 

• Comprehensive Glitch Signoff – Learnings and experiences from industry use cases

  11:00 am — 12:30 pm • Workshop

  Vikas Sachdeva, Director of Product Strategy and Business Development at Real Intent

  ---

  • 

Monday, February 24, 2025

• Complex Verification Example: RISC-V MMU Verification of Virtualization and Hypervisor Operation for CPU and SOC platforms

  3:30 pm — 5:00 pm • Workshop

  • 

• Emulation Driven Power Estimation for Real World Applications

  11:00 am — 12:30 pm • Workshop

  Arti Dwivedi, Group Director, Product Engineering, Cadence Design Systems; Yash Bhagwat, Senior Emulation Verification Engineer at NVidia; Michael Young, Senior Product Management Group Director, Cadence Design Systems

  ---

  • 

• Moving Application-level Power Optimization to Pre-silicon with Advanced Hybrid Emulation and Power Exploration Technologies

  1:30 pm — 3:00 pm • Workshop

  • 

• Power Dynamics: Shaping the future of the data centric era

  3:30 pm — 5:00 pm • Workshop

  • 

• PSS case studies in real-life projects

  1:30 pm — 3:00 pm • Workshop

  Moshik Rubin, Cadence; Sergey Khaikin, Cadence; Santosh Kumar, Qualcomm; Klaus Hilliges, Advantest

• Step Function Leaps in RTL Functional Verification Powered by AI/ML Innovations

  1:30 pm — 3:00 pm • Workshop

  • 

• Accelerating Design & Verification with AI Agents

  9:00 am — 10:30 am • Workshop

  Freddy Nunez, Applications Engineer, Agnisys Inc.; Neena Chandawale, Applications Engineer, Agnisys Inc.

  ---

  • 

Tuesday, February 4, 2025

• Modernizing the Hardware / Software Interface - Life beyond spreadsheets. How to bring your SoC register design into the 21st Century

  9:00 am — 10:30 am • Tutorial

  Tim Schneider – Sr. Manager of Field Application Engineering

  ---

  • 

Sponsored Academic Workshop

Saturday, February 24, 2024

• Accelerating Functional Verification with Machine Learning

  9:00 am — 10:30 am • Workshop

  • 

Accellera Workshops

Thursday, February 27, 2025

• SoC development automation using IP-XACT 1685-2022 standard

  9:00 am — 10:30 am • Workshop

  • 

• CDC/RDC Interchange Format Standard

  11:00 am — 12:30 pm • Workshop

  Bill Gascoyne, Blue Pearl Software; Ping Yeung, Nvidia; Chetan Choppali Sudarshan, Marvell; Don Mills, Microchip Technology; Anupam Bakshi, Agnisys; Farhad Ahmed, Siemens EDA; Iredamola Olopade, Accellera

Monday, February 24, 2025

• Introduction of IEEE 1801-2024 (UPF4.0) improvements for the specification and verification of low-power intent

  9:00 am — 10:30 am • Workshop

  John Decker, IEEE P1801 Workgroup Chair; Daniel Cross, Cadence; Amit Srivastava, IEEE P1801 Workgroup Vice-Chair; Lakshmanan Balasubramanian, IEEE P1801 Workgroup Secretary; Marcelo Glusman, Cadence; Medaramitta Jeevan, Siemens; Gabriel Chidolue, Siemens; Rick Koster, Siemens; Raguvaran Easwaran, Intel; Paul Bailey, Nordic Semiconductor; Progyna Khondkar, Cadence

  ---

  • 

• Moving Forward with IEEE 1800.2 UVM: Practical Insights and the Benefits of Migration

  11:00 am — 12:30 pm • Workshop

  Justin Refice, NVIDIA

  ---

  • 

Saturday, February 24, 2024

• PSS Comes of Age: Runtime Behavioral Coverage, Methodology and More

  3:30 pm — 5:00 pm • Workshop

  Hillel Miller, Synopsys; Prabhat Gupta, AMD

  ---

  •