Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.

Verification is the largest driver of time and cost in modern semiconductor projects, often consuming up to two-thirds of total development effort. Debugging and coverage closure dominate this workload, creating long, iterative loops between design and verification teams. Traditionally, “shift left” methodologies have sought to empower designers to verify more of their own work earlier in the cycle—but steep learning curves for verification tools have limited adoption.

AI—especially large language model (LLM)-powered assistants—offers a new way forward. These tools can generate complete, high-quality verification assets from natural-language design intent, automate simulation and formal runs, and produce actionable debug reports in minutes. Advocates see this as the breakthrough that will make “design with verification” a reality. Skeptics question whether AI can handle the complexity, corner cases, and predictability demands of industrial-scale verification.

This panel will bring together leaders in AI, EDA, and semiconductor design to debate whether AI is truly the key to ending the verification bottleneck—or just the next over-hyped technology.

Panel Moderator: Vishal Karna