Session Chair: Bhaskar Vedula
- [1103] Expedite multi-die coherency verification through adaptive VIP subsystem
- Jainender Kumar, Samsung Semiconductor India Research Bengaluru, India; Sunil Shrirangrao Kashide, Samsung Semiconductor India Research Bengaluru, India; Garima Srivastava, Samsung Semiconductor India Research Bengaluru, India; Dimitry Pavlovsky, Cadence Design Systems Pvt Ltd, USA; Anunay Bajaj, Cadence Design Systems Pvt Ltd Noida, India
- [1120] Leverage Real USB Devices for USB Host DUT verification
- Suchir Gupta, Synopsys Inc; Amit Sharma, Synopsys Inc
- [1015] Design scheme for Emulator-friendly Memory Verification IP to Accelerate Simulation Performance
- Sunghyeon Kang, SK Hynix; Munsik Bae, SK Hynix; Jinsung Song, SK Hynix; Seokho Hong, Siemens EDA; Minsung Kang, SK Hynix; Sangkyoo Jeong, SK Hynix