Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.
Puneet Goel, Incore Semiconductors; Ritu Goel, Coverify Systems Technology; Jyoti Dahiya, Coverify Systems Technology
High-end RISC cores encompass intricate processor architectures that comprise of complex instruction pipelines and convoluted maneuvers like instruction re-ordering. Functional verification of such cores require a signification effort involving thousands of millions of millions ($10^{15}$) randomized instructions\cite{ARM-verif}. The RISCV-DV project, coded in SystemVerilog, generates about 10,000 instructions in a second. At this rate it may take several machine years to generate the required randomized sequences of RISC-V instructions.