Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.
Jan Kreisinger, Allegro MicroSystems, Inc; Sanjay Chatterjee, Allegro MicroSystems, Inc
Well-defined design requirements tracking workflow throughout the verification process considerably impacts the completeness of the verification effort and on-time execution of the project. Sometimes the verification plan development and documentation are considered an unnecessary overhead to the “actual” verification effort, however, it must be understood that incomplete or inconsistent design requirements mapping on the verification plan can lead to a project schedule slip, indemonstrable verification results, and missed bugs. This paper presents design requirements tracking workflow based on the Jama Connect tool, a requirements management tool from Jama, and vManager, a regression management tool from Cadence. Manual work to create the interface between these tools is minimized by two Python scripts based on Jama REST API.