Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.

1044: Requirements Recognition for Verification IP Design Using Large Language Models

Tuesday, March 5, 2024 9:00 am — 11:00 am

Verification becomes more crucial in the design of complex systems on a chip. To make this process more sustainable, the verification IPs (VIPs) has to be utilized. However, the development of VIPs relies on deep understanding of the target IP specification. The internals of the VIP are usually designed based on the requirements, which cannot be easily extracted from the specification. Thus, Large Language Models (LLMs) can be used in order to identify the requirements. The experimental study shows that GPT-2 model provides good performance (Precision=0.618, Recall=0.874) that improves the process of requirements extraction by at least 20% comparing to the manual process. Also this approach can be used for automation (semi-automation) of other routines required in the VIP development process.