Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.
Prathik R, Samsung Semiconductor India Research, Bengaluru; Ramesh Madatha, Samsung Semiconductor India Research, Bengaluru; Girish Kumar Gupta, Samsung Semiconductor India Research, Bengaluru; Tony Gladvin George, Samsung Electronics, Korea
As high-speed computation and data transfers rise, layered protocol subsystems become increasingly prominent. Verification IP (VIP) play a crucial role in verifying these protocols, with the complexity of the test environment growing proportionally with the complexity of the design under verification. Traditional VIP development, centered around controllability and observability, might fall short with next-gen, layered, and multiplexed protocols. This makes us think of an approach to scale the VIP horizontally along with the reusable standards to minimize the development cycle and look for ways to enhance reusability, controllability and observability of a VIP. In this paper, we would like to propose a solution to develop a reusable VIP that accounts to scale for multi-layer multiplexed protocols with enhanced controllability and observability.