Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.

Automate the Pain Away: HW/SW Interface Design Methodology

Monday, March 2, 2026 3:30 pm — 5:00 pm

Modern System on Chip (SoC) designs involve many components: Hardware Description Languages (VHDL, System Verilog), Unified Power Format (UPF), Software Languages (C#/C++), Interconnect standards (IPXACT, AMBA) and purpose built layers such as the Universal Verification Methodology (UVM) and System Verilog Assertions (SVA).

This tutorial explores SoC Integration technologies to ""blend"" these components together, proposing a more efficient methodology to increase productivity and ensure first-time SoC project success. The example design combines RISC-V processor elements, Arteris IP and AMBA Peripherals, “blending” together the various standards such as CSRSpec, System Verilog, UPF and IP-XACT into a complete SoC system. Index Terms – SoC Integration; IP-XACT; System Verilog; UVM; Hardware Software Interface, RISC-V.