Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.
Vikas Sachdeva, Bangalore
This workshop, titled "Liberating Functional Verification from Boolean Shackles", emphasizes the growing importance of static signoff in early-stage functional verification. It highlights how static methods, unlike traditional Boolean-based simulation and formal techniques, offer faster, scalable, and easier verification—crucial for handling today’s complex SoC designs. Covering real-world case studies and best practices, the session demonstrates how early RTL static signoff improves design quality, reduces re-spins, shortens time-to-market, and enhances security. It’s aimed at RTL designers, verification engineers, and chip architects seeking efficient, shift-left verification strategies.